University of Hawaii

Electrical Engineering

Development of a Waveform Sampling ASIC with Femtosecond Timing for a Low Occupancy Vertex Detector

Date: 2018-03-07           Add to Google Calendar
Time: 3:00pm-5:00pm
Location: Holmes Hall 389
Speaker: Peter Orel (UHM EE PhD Candidate)

Abstract

Vertex detectors provide space-time coordinates for the traversing charged particle decay products closest to the interaction point of a high-energy particle collider. Resolving these increasingly intense particle fluences at higher luminosities (larger number of collisions per second) is an ever-growing challenge. Furthermore, such fluences result in a non-negligible occupancy of the vertex detectors using existing low material budget techniques. Consequently, new approaches are being studied that meet the vertexing requirements while lowering the occupancy and the data rate. In this work we introduce the architecture and specifications for a novel vertex detector design based on femtosecond precision timing. The feasibility study results indicate that the new detector ladder design could achieve an occupancy ten times lower than its predecessor in the Belle II spectrometer, while maintaining a comparable spatial resolution. Furthermore, this leads to a considerable reduction in the detector data rate, thus lowering the cost of the subsequent processing electronics. one of the crucial parts of the detector is its readout ASIC (RFpix), whose development steps are discussed in detail. The RFpix is a twelve-bit resolution waveform digitizer with a sampling seed of 20 GS/s and an analog bandwidth of 3GHz. Post-layout simulation results of the RFpix prototype analog front-end are shown and thoroughly analyzed. The simulated performance is shown to match the RFpix requirements, thus reaching an exquisite timing resolution of 160 fs.



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