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Date:  Tue, January 01, 2008
Time:  10:30
Location:  Holmes 389
Speaker:  Vladimir Stojanovic Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology

Limited energy-efficiency of standard electrical interconnect limits the on-chip and off-chip throughput of today's power constrained ICs.  Increasing focus on parallelism in processor applications and system-on-a-chip paradigm for ASICs further exacerbate the need for high-throughput, energy-efficient interconnect schemes.

This talk will describe efforts in Integrated Systems Group at MIT to overcome these problems by looking across the layers of design hierarchy. First, some system and circuit ideas to improving the existing copper interconnects will be described, followed by examples of how new device technologies (like carbon nanotubes and silicon photonics) can be used to solve the interconnect problem. To make best use of the new devices we often need to make a set of changes across all levels of design hierarchy (from different driver and receiver circuits to different network topologies). To assist in these, a new methodology of vertical design optimization has to be established to more firmly connect the link performance to the power dissipation of link circuits. Put together, these new interconnect approaches have a potential to improve the throughput of digital systems by an order of magnitude in next few process nodes.

Bio:

Vladimir Stojanovic is an assistant professor in the Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology. His current research interests include design, modeling and optimization of integrated systems, from standard VLSI blocks to CMOS-based electrical and optical interfaces. He is also interested in design and implementation of digital communication techniques in high-speed interfaces and high-speed mixed-signal IC design.

Vladimir received his Ph.D. in Electrical Engineering from Stanford University in 2005. He received his M.S. degree in Electrical Engineering from Stanford University in 2000 and the Dipl. Ing. degree from the University of Belgrade, Serbia in 1998.

He was also with Rambus, Inc., Los Altos, CA, from 2001 through 2004. He was a visiting scholar with the Advanced Computer Systems Engineering Laboratory, Department of Electrical and Computer Engineering, University of California, Davis, during 1997-1998.